Friday, May 30, 2014

Do we need an Open Source projects repository?

Hi Everyone, I wanted to announce the latest guest blog:

Some of you (many) are aware of the author, 
Petr Tošovský, an avid contributor to the Altium Live community, who has been involved in the past with creating the google code project for Altium Designer Addons - a site where users have shared numerous scripts for Altium Designer.

In his blog Petr highlights some really interesting open-source hardware projects (there are so many more we don't know about) and we think you'd like to check them out for yourself. There's much to be gained and leaned from these designs and how to apply Altium Designer to new products.

Thursday, May 29, 2014

Announcement: Altium Designer 14.3

This update delivers a powerful array of new features and enhancements to the core technologies, while also addressing many issues raised by our customers. In total, 35 new features and 150 fixes and enhancements.

Some highlights of this release

  • Schematic Wire Drag Improvements
  • Enhancements to Variants
  • Enhanced Polygon Editing and Management
  • Interactive Routing Improvements
  • Length Tuning Enhancements
  • Via Shielding
  • Enhanced PCB Filtering
  • PCB Fixed Single Selection Order
  • Support for Generating Folded STEP Models of a Board
  • IPC-7351B Compliance
  • ActiveBOM Enhancements
  • System & Performance Enhancements

See What's New to find out about all the feature highlights.

See Release Notes for a complete listing of all the bug fixes and enhancements.


Accessing the Update

Altium Designer 14.3 is a major update. It is not possible to update from Altium Designer 14.2 to 14.3, a new installation is required. You have the choice to continue with your current version or to install Altium Designer 14.3 to access the latest features. Alternatively, have both installed side-by-side, and use the version that best suits your needs.  The new Installer can be downloaded from the download page in AltiumLive.

Download Altium Designer 14.3 Installer

Note: If you are using a Private Server license or Standalone license and have renewed your Subscription since activation, you may need to reactivate your license.  

A new Offline Installer is also available, please contact your local Altium office or Value Added Reseller.


Monday, May 5, 2014

Announcement: Altium Designer 14.2.5 update available (5 May 2014)

Release Notes for Altium Designer Version 14.2

Version 14.2.5

Build: 32823 Date:5 May 2014


A crash when database libraries experience connection problems while placing parts or generating BOM reports has been fixed.


Access violations caused by PCB editing, routing and undo operations have been fixed through the investigation of crash reports.


Pads are now generated correctly in Gerber files for flipped Embedded Board Arrays. BC:3639


The "Flipped on Layer" option is no longer being set during ECO component placement due to default PCB primitive settings. BC:3796 BC:4024

Version 14.2.4

Build: 31871 Date:5 March 2014


Grouping Vault Search results no longer causes an exception error.


Variant values are now displayed correctly for Multi-Channel and Complex Hierarchy schematic projects. BC:3977


The Preferences option in the Subversion update repository dialog now works correctly and no longer causes an exception error.


PCB footprint names that use special characters (such as * or /), no longer cause footprint not found errors and other editing, browsing and synchronizing issues. BC:3952


Rotating schematic .EMF graphic files no longer causes an exception error.

Version 14.2.3

Build: 31718 Date:19 February 2014


Schematic drawing line object now supports "dash dotted" line style.


Schematic Pin object now includes Line Width attribute for Symbols.


Schematic arcs now always display correctly at different zoom levels.


Schematic documents now render non english text correctly when saving between AD10 and AD14 formats.


Box.Net publisher has been updated and now uploads files correctly.


The "Create Primitives From Board Shape" command now correctly uses arcs instead of line segments.


DBLib and SVNLib using MySQL will now attempt to reconnect automatically to the server after PC hibernation or lost connection. BC:2824 BC:1930


Subversion commit comments now support quotation marks. BC:1661


Subversion commit comments now properly support different language input text. BC:2133


Subversion 1.8 support has been added. This also includes support for the new working folder format, as well as updating the built-in Subversion Client to version 1.8.4. BC:3193


OrCAD Capture export now correctly handles Power, GND and test point objects.


PCB Drill Table has been updated to include new Text Alignment and Column Width settings (available from the right-click menu).


Schematic now supports vector graphic images (.wmf and .svg).


PCB Polygon repour speed has been significantly improved. Speed increase up to 20x depending on number and complexity of polygons.


There is no longer a hang when running the automatic loop removal tool.


PCB footprint primitives are no longer removed from the footprint during interactive routing.


Loop removal will no longer remove incorrect track.


PCB Polygon Pour quality has been improved when using hatched style and polygon cutouts.


PCB Design Rule dialog will now grey out disabled rules making it easier to distinguish between enabled and disabled rules.


The PCB Library Report can now support non english characters.


Schematic documents now render text correctly when using non english language system settings.


Smart PDF now supports an option to include "Global Bookmarks for Components and Nets".


PCB Copy Room Formats command will no longer copy the board region.


PADS Library importer has been updated to fix specific cases where components were not created.


DxDesigner importer has been updated to fix connection issues with off grid objects.


PCB Via Stitching has been improved and will now properly use the clearance rule settings.


Schematic Formatting Toolbar can now change text font and size settings.


STEP model clearance errors between top and bottom layers has been fixed.


Selecting PCB components in Single Layer Mode will now only select components which are on that layer. BC:3545 BC:997


Schematic directives no longer produce false error reports when single documents are compiled.


The PCB Printout Properties dialog now opens correctly even if the PCB is not the top document window.


Use of the backslash character (\) in an Output Job container file name no longer inserts an underscore character (_).


The PCB Drill Table is now correctly re-positioned when using the Move»Move Selection by X,Y command.


Scripts using SchServer.RobotManager.SendMessage can now be run successfully,


PCB Undo now works correctly when primitives are deleted from a component.


The PCB "Update Free Primitives From Component Pads" command no longer removes vias from their nets.


The Locked attribute is no longer updated when changing the Pad or Via test point settings. BC:3758


Deselecting the Preview top - bottom layer command for a drill table, will no longer cause an Access Violation.


PCB polygon thermal relief calculation causing incorrect DRC violations in some situations has been fixed.


IDF Export has been updated to fix a hang when exporting from specific files.


The Libraries Panel now remembers the layout when the application is restarted.


There is no longer a discrepancy in the display of top and bottom SM layers when opacity is set to 50%.


Smart PDF now displays the correct component parameters when using Variants. BC:2517 BC:3201


BOM generation now supports variant supplier and supplier part number parameters. BC:3222


Variants now support the .COMMENT and .REFDES special fields. BC:2083


The Schematic "Update From Libraries" command has been updated. The "Preserve Parameter locations" option now works correctly and a new option "Preserve parameter visibility" has been added. BC:59 BC:839


Automatic adjustments to track end-points when moving a selected track can now be reliably undone using the Undo feature. BC:431


The Schematic "Break Wire" command now works with wires that have smallest width setting. BC:829


Soldermask now correctly remains as defined for regions and polygons after saving and reloading.


Net Antennas with a terminating via are now correctly detected by the DRC. BC:1491


Chinese and Russian text is now correctly encoded when exporting a Schematic to DXF.


Via Stitching by constrained area no longer causes shorts with polygons on internal layers.


The issue of incorrect From-To lengths has been partially resolved. Length evaluation no longer counts primitives twice when modifying an existing net. Note: Incorrect evaluation of a complex signal path between points could still occur. BC:441


The Schematic Library Parameter Manager now displays selected pins when "Selected Objects Only" option is enabled. BC:875


The query InFromToClass will return all primitives in the from-to, and will no longer miss track segments. BC:1229


Vault now supports batch download of selected items.


There is no longer an Access Violation when generating a Gerber from a PCB containing an active drill table.


The legend in a generated Drill Drawing now works correctly when using Characters for the .Legend symbols. BC:2929


FPGA to PCB Project Wizard now uses installed FPGA integrated libraries to correctly place schematic symbols in generated PCB project.


DXF Exporter now correctly supports slot holes (zero line width and donut), and square holes.


Debugging embedded project targeting discrete CPU no longer causes a crash on exit.


There is no longer an error when using the parameter "=VariantName" as the folder name in an Output Job file. BC:3826


An issue with the Mixed Simulation engine failing to create the correct netlist has been resolved.


There is no longer an issue when exporting files for route using SPECCTRA. BC:3833


There is no longer an Access Violation when printing a schematic containing a large graphic image.


IDF Exporter has been fixed to resolve the issue with duplicated board outlines. BC:3696


The Layer Stack Manager dialog now correctly opens in active display space, in accordance with monitor configuration.


The "ssl_error_unsafe_negotiation" error no longer occurs when opening URLs inside Altium Designer.


There is no longer a crash in Supplier_TME when closing Altium Designer.


An access violation caused by an undo operation in PCB has been fixed through the investigation of a crash report.


The correct board height is now used when exporting to STEP.


An access violation associated with importing preference files has been fixed.


Version 6.3 and 6.5 Eagle files can now be successfully imported to Altium Designer without error or Access Violations being generated.


There is no longer a crash when accessing SchServer.RobotManager.SendMessage through a script.


The graphical preview of the schematic part is once again available when accessing the Port Map tab for a Sim Model.


Parameters with spaces in their names can now be used indirectly through a part's Comment field. BC:1129


Issues with the import of EAGLE files have been fixed. EAGLE frames have been implemented, the un-named sheets issue addressed, and schematic loading for version 6.5.0 also resolved.


The version number is now correctly checked for the Lattice Diamond toolchain.


There is no longer an Access Violation when clicking on All Folders after an initial Vault search.


Vias are no longer removed from existing Via Stitch objects when cancelling the Via Stitch by Area command.


A crash with the SCH List panel when changing scope is now resolved.


TMDS33 constraint for Xilinx Transition Minimized Differential Signaling IO standard is correctly translated to UCF TMDS_33 value.


CoreGenerator targeting Xilinx devices now correctly generates the FIFO memories for data widths other than multiples of 8.


Editing the properties of a component from the SCH Library panel no longer causes the location of that component to change in the panel's listing of components.


The layer for a placed via can no longer be changed through the PCB List panel.


The PCB Signal Integrity design rules are now analyzed by the Signal Integrity extension.


An issue with incorrect library selection in the Libraries panel has been resolved. The library selected rather than the one under the cursor is now correctly used. BC:2868 BC:3079


An issue whereby the "Flipped on Layer" option was being erroneously set during component placement, has been resolved. BC:3796 BC:3843


The Process Flow after successful synthesis is no longer reset when performing a manual refresh (F5).


FPGA build status in Devices View is correctly updated when Altera Synthesizer is used.


A new FPGA compiler option has been added to the FPGA General Preferences to "Clear compiler output messages".


FPGA projects are now linked properly to PCB projects when components are placed from the Vault.


Embedded extension adds support for TI Stellaris and NXP LPC2000 families of discrete microcontrollers.


Cortex-M3-based Stellaris Support extension enables programming and debugging for Texas Instruments Stellaris family of microcontrollers.


ARM7-based LPC2000 Support extension adds programming and debugging for NXP LPC2000 seriesdiscrete microcontrollers.