Monday, May 5, 2014

Announcement: Altium Designer 14.2.5 update available (5 May 2014)

Release Notes for Altium Designer Version 14.2

Version 14.2.5

Build: 32823 Date:5 May 2014

2085

A crash when database libraries experience connection problems while placing parts or generating BOM reports has been fixed.

2146

Access violations caused by PCB editing, routing and undo operations have been fixed through the investigation of crash reports.

2256

Pads are now generated correctly in Gerber files for flipped Embedded Board Arrays. BC:3639

2278

The "Flipped on Layer" option is no longer being set during ECO component placement due to default PCB primitive settings. BC:3796 BC:4024

Version 14.2.4

Build: 31871 Date:5 March 2014

1964

Grouping Vault Search results no longer causes an exception error.

2083

Variant values are now displayed correctly for Multi-Channel and Complex Hierarchy schematic projects. BC:3977

2104

The Preferences option in the Subversion update repository dialog now works correctly and no longer causes an exception error.

2106

PCB footprint names that use special characters (such as * or /), no longer cause footprint not found errors and other editing, browsing and synchronizing issues. BC:3952

2109

Rotating schematic .EMF graphic files no longer causes an exception error.

Version 14.2.3

Build: 31718 Date:19 February 2014

1151

Schematic drawing line object now supports "dash dotted" line style.

1152

Schematic Pin object now includes Line Width attribute for Symbols.

1279

Schematic arcs now always display correctly at different zoom levels.

1313

Schematic documents now render non english text correctly when saving between AD10 and AD14 formats.

1331

Box.Net publisher has been updated and now uploads files correctly.

1345

The "Create Primitives From Board Shape" command now correctly uses arcs instead of line segments.

1349

DBLib and SVNLib using MySQL will now attempt to reconnect automatically to the server after PC hibernation or lost connection. BC:2824 BC:1930

1357

Subversion commit comments now support quotation marks. BC:1661

1358

Subversion commit comments now properly support different language input text. BC:2133

1363

Subversion 1.8 support has been added. This also includes support for the new working folder format, as well as updating the built-in Subversion Client to version 1.8.4. BC:3193

1392

OrCAD Capture export now correctly handles Power, GND and test point objects.

1457

PCB Drill Table has been updated to include new Text Alignment and Column Width settings (available from the right-click menu).

1458

Schematic now supports vector graphic images (.wmf and .svg).

1459

PCB Polygon repour speed has been significantly improved. Speed increase up to 20x depending on number and complexity of polygons.

1478

There is no longer a hang when running the automatic loop removal tool.

1482

PCB footprint primitives are no longer removed from the footprint during interactive routing.

1484

Loop removal will no longer remove incorrect track.

1485

PCB Polygon Pour quality has been improved when using hatched style and polygon cutouts.

1486

PCB Design Rule dialog will now grey out disabled rules making it easier to distinguish between enabled and disabled rules.

1516

The PCB Library Report can now support non english characters.

1529

Schematic documents now render text correctly when using non english language system settings.

1531

Smart PDF now supports an option to include "Global Bookmarks for Components and Nets".

1547

PCB Copy Room Formats command will no longer copy the board region.

1550

PADS Library importer has been updated to fix specific cases where components were not created.

1551

DxDesigner importer has been updated to fix connection issues with off grid objects.

1555

PCB Via Stitching has been improved and will now properly use the clearance rule settings.

1579

Schematic Formatting Toolbar can now change text font and size settings.

1580

STEP model clearance errors between top and bottom layers has been fixed.

1581

Selecting PCB components in Single Layer Mode will now only select components which are on that layer. BC:3545 BC:997

1582

Schematic directives no longer produce false error reports when single documents are compiled.

1584

The PCB Printout Properties dialog now opens correctly even if the PCB is not the top document window.

1585

Use of the backslash character (\) in an Output Job container file name no longer inserts an underscore character (_).

1586

The PCB Drill Table is now correctly re-positioned when using the Move»Move Selection by X,Y command.

1587

Scripts using SchServer.RobotManager.SendMessage can now be run successfully,

1588

PCB Undo now works correctly when primitives are deleted from a component.

1594

The PCB "Update Free Primitives From Component Pads" command no longer removes vias from their nets.

1601

The Locked attribute is no longer updated when changing the Pad or Via test point settings. BC:3758

1604

Deselecting the Preview top - bottom layer command for a drill table, will no longer cause an Access Violation.

1608

PCB polygon thermal relief calculation causing incorrect DRC violations in some situations has been fixed.

1612

IDF Export has been updated to fix a hang when exporting from specific files.

1616

The Libraries Panel now remembers the layout when the application is restarted.

1617

There is no longer a discrepancy in the display of top and bottom SM layers when opacity is set to 50%.

1618

Smart PDF now displays the correct component parameters when using Variants. BC:2517 BC:3201

1619

BOM generation now supports variant supplier and supplier part number parameters. BC:3222

1620

Variants now support the .COMMENT and .REFDES special fields. BC:2083

1624

The Schematic "Update From Libraries" command has been updated. The "Preserve Parameter locations" option now works correctly and a new option "Preserve parameter visibility" has been added. BC:59 BC:839

1626

Automatic adjustments to track end-points when moving a selected track can now be reliably undone using the Undo feature. BC:431

1627

The Schematic "Break Wire" command now works with wires that have smallest width setting. BC:829

1630

Soldermask now correctly remains as defined for regions and polygons after saving and reloading.

1636

Net Antennas with a terminating via are now correctly detected by the DRC. BC:1491

1647

Chinese and Russian text is now correctly encoded when exporting a Schematic to DXF.

1652

Via Stitching by constrained area no longer causes shorts with polygons on internal layers.

1662

The issue of incorrect From-To lengths has been partially resolved. Length evaluation no longer counts primitives twice when modifying an existing net. Note: Incorrect evaluation of a complex signal path between points could still occur. BC:441

1664

The Schematic Library Parameter Manager now displays selected pins when "Selected Objects Only" option is enabled. BC:875

1665

The query InFromToClass will return all primitives in the from-to, and will no longer miss track segments. BC:1229

1668

Vault now supports batch download of selected items.

1697

There is no longer an Access Violation when generating a Gerber from a PCB containing an active drill table.

1700

The legend in a generated Drill Drawing now works correctly when using Characters for the .Legend symbols. BC:2929

1701

FPGA to PCB Project Wizard now uses installed FPGA integrated libraries to correctly place schematic symbols in generated PCB project.

1706

DXF Exporter now correctly supports slot holes (zero line width and donut), and square holes.

1711

Debugging embedded project targeting discrete CPU no longer causes a crash on exit.

1714

There is no longer an error when using the parameter "=VariantName" as the folder name in an Output Job file. BC:3826

1836

An issue with the Mixed Simulation engine failing to create the correct netlist has been resolved.

1837

There is no longer an issue when exporting files for route using SPECCTRA. BC:3833

1849

There is no longer an Access Violation when printing a schematic containing a large graphic image.

1850

IDF Exporter has been fixed to resolve the issue with duplicated board outlines. BC:3696

1857

The Layer Stack Manager dialog now correctly opens in active display space, in accordance with monitor configuration.

1874

The "ssl_error_unsafe_negotiation" error no longer occurs when opening URLs inside Altium Designer.

1911

There is no longer a crash in Supplier_TME when closing Altium Designer.

1913

An access violation caused by an undo operation in PCB has been fixed through the investigation of a crash report.

1934

The correct board height is now used when exporting to STEP.

1936

An access violation associated with importing preference files has been fixed.

1944

Version 6.3 and 6.5 Eagle files can now be successfully imported to Altium Designer without error or Access Violations being generated.

1945

There is no longer a crash when accessing SchServer.RobotManager.SendMessage through a script.

1947

The graphical preview of the schematic part is once again available when accessing the Port Map tab for a Sim Model.

1948

Parameters with spaces in their names can now be used indirectly through a part's Comment field. BC:1129

1954

Issues with the import of EAGLE files have been fixed. EAGLE frames have been implemented, the un-named sheets issue addressed, and schematic loading for version 6.5.0 also resolved.

1961

The version number is now correctly checked for the Lattice Diamond toolchain.

1962

There is no longer an Access Violation when clicking on All Folders after an initial Vault search.

1963

Vias are no longer removed from existing Via Stitch objects when cancelling the Via Stitch by Area command.

1965

A crash with the SCH List panel when changing scope is now resolved.

1967

TMDS33 constraint for Xilinx Transition Minimized Differential Signaling IO standard is correctly translated to UCF TMDS_33 value.

1968

CoreGenerator targeting Xilinx devices now correctly generates the FIFO memories for data widths other than multiples of 8.

1981

Editing the properties of a component from the SCH Library panel no longer causes the location of that component to change in the panel's listing of components.

1985

The layer for a placed via can no longer be changed through the PCB List panel.

1988

The PCB Signal Integrity design rules are now analyzed by the Signal Integrity extension.

1991

An issue with incorrect library selection in the Libraries panel has been resolved. The library selected rather than the one under the cursor is now correctly used. BC:2868 BC:3079

1993

An issue whereby the "Flipped on Layer" option was being erroneously set during component placement, has been resolved. BC:3796 BC:3843

1996

The Process Flow after successful synthesis is no longer reset when performing a manual refresh (F5).

1998

FPGA build status in Devices View is correctly updated when Altera Synthesizer is used.

2067

A new FPGA compiler option has been added to the FPGA General Preferences to "Clear compiler output messages".

2070

FPGA projects are now linked properly to PCB projects when components are placed from the Vault.

2079

Embedded extension adds support for TI Stellaris and NXP LPC2000 families of discrete microcontrollers.

2080

Cortex-M3-based Stellaris Support extension enables programming and debugging for Texas Instruments Stellaris family of microcontrollers.

2081

ARM7-based LPC2000 Support extension adds programming and debugging for NXP LPC2000 seriesdiscrete microcontrollers.

 

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